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Working XTA (IDE on XT) setup on GLaBIOS

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Reply 60 of 61, by 640KB

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highvoltage wrote on 2024-04-27, 19:28:

Last night I also found this really nice multi-io RTC card. But it had a varta battery on board that was already spewing acid all over the place. Card doesn't detect at the moment, but I'm going to fix it up more so that I can get more GLaBIOS output on the screen more than anything else. I'm borrowing a friend's eprom writer at the moment (he wrote me GLaBIOS in December and I only got to actually try it out a when I started playing with this XT now) and I want to write the newer version so that I can get that pretty 2024 date on my archaic hardware.

I looked again at this picture of the I/O card to try to identify the chipset on it. Would it be possible to take another photo of it with the chip markings in the bottom left visible as well as a clear shot of that square ASIC chip? I'm a tad perplexed as to what that does since it's got discrete serial port chips as well as a discrete floppy controller. Quite a big chip for a single parallel and game port.

When you say it doesn't detect, do you mean not the serial/parallel ports or the RTC? So RTC clock support is actually added with the GLaTICK option ROM, however there are quite a few different types of RTC chips to support so that's part of the reason I'm wondering which one this has.

Reply 61 of 61, by 640KB

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weedeewee wrote on 2024-04-28, 06:33:

also wrt the XTA bios, does it use dma for data transfers ?

Definitely uses PC's DMA channel 3 as a typical XT hard drive controller. I'm sure this is just a slightly modded ST506/ST412 BIOS with only enough changes to support the XTA drive.

Here's a snippet where it sets up the DMA controller for an operation (and there's plenty more DMAC code in there):

C800:040B  E8 0065             CALL  SETUP_DMA		; calculate buffer's physical address for DMA (below)
C800:040E  72 1B               JC    042B			; exit if error
C800:0410  8B C1               MOV   AX, CX			; AX = DMA transfer length in bytes
C800:0412  E6 07               OUT   07, AL			; set DMA Count Register channel 3 (low)
C800:0414  8A C4               MOV   AL, AH
C800:0416  E6 07               OUT   07, AL			; set DMA Count Register channel 3 (high)
...
							SETUP_DMA:
C800:0473  80 3E 0046 80       CMP   BYTE PTR [46H], 80H ; BDA disk last status byte error?
C800:0478  77 34               JA    04AE			; exit if error
C800:047A  E6 0C               OUT   0CH, AL		; reset DMAC high/low byte flip-flop
C800:047C  E6 0B               OUT   0BH, AL		; set DMA mode
C800:047E  8C C0               MOV   AX, ES			; AX = requested DMA buffer segment
C800:0480  B1 04               MOV   CL, 4			; set up for nibble size bit shift
C800:0482  D3 C0               ROL   AX, CL			; roll segment paragraph to low nibble
C800:0484  8A E8               MOV   CH, AL			; CH low nibble = page register
C800:0486  24 F0               AND   AL, 11110000B	; clear low nibble (the shifted page reg)
C800:0488  03 C3               ADD   AX, BX			; AX = DMA buffer start physical offset for transfer
C800:048A  50                  PUSH  AX				; save start of buffer
C800:048B  50                  PUSH  AX
C800:048C  E6 06               OUT   06, AL			; set DMA Start Address Register channel 3 (low)
C800:048E  8A C4               MOV   AL, AH
C800:0490  E6 06               OUT   06, AL			; set DMA Start Address Register channel 3 (high)
C800:0492  73 02               JNC   0496			; jump if segment + offset did not overflow page
C800:0494  FE C5               INC   CH				; otherwise next page (why not just do an ADC?)
C800:0496  8A C5               MOV   AL, CH			; AL = physical page register
C800:0498  24 0F               AND   AL, 00001111B	; isolate low nibble (seg paragraph)
C800:049A  E6 82               OUT   82, AL			; set PC DMA Channel 3 page register
...
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