If it's largely based upon a software emulator I see no point to add another layer of emulation/simulation by building custom hardware - especially when the OPL3 is largely digital anyways.

shock__ wrote:

If it's largely based upon a software emulator I see no point to add another layer of emulation/simulation by building custom hardware - especially when the OPL3 is largely digital anyways.

The algorithms are universal no matter if implemented with software or hardware.

I personally have been toying around with an idea of FPGA ISA card for some time. It could do anything with suitable adapters like emulate any sound card or be an SD card/USB stick reader for IDE/floppy/cdrom emulator.

Afaik both Steffens C++ code and the FPGA code (Verilog?) is based on same reverse engineering effort we have been working on.

An ISA FPGA card would be cool, but would also be a very tough project. First, FPGAs require a large number of power planes and have significant problems for decoupling and fanout. Second, ideally the FPGA could be programmed in a vintage environment such as DOS or Win9x therefore allowing the device to be appropriately configured as the system initializes, yet the tools are highly proprietary and generally not available for older operating systems.

Even without the second issue being resolved, the device would be very interesting and powerful, but it would be quite a big, complex project.

Jepael wrote:

The algorithms are universal no matter if implemented with software or hardware.

I personally have been toying around with an idea of FPGA ISA card for some time. It could do anything with suitable adapters like emulate any sound card or be an SD card/USB stick reader for IDE/floppy/cdrom emulator.

Afaik both Steffens C++ code and the FPGA code (Verilog?) is based on same reverse engineering effort we have been working on.

Nothing wrong there ... my statement was a mere attempt to decelerate the "oh, we have the code so building something is easy"-bandwagon 😉 I generally agree with you & gdjacobs and re-designing the ARGUS to FPGA once I run out of InterWave chips actually is on my agenda ... albeit at a very low and undecided priority.

A FPGA ISA "project card" is certainly feasible. The Apple II folks have one called "Carte Blanche" that is being used for all sorts of projects.

http://www.applelogic.org/CarteBlanche.html
http://www.applelogic.org/files/CB1FLYER.png

Current revision: http://www.applelogic.org/CarteBlancheII.html

They claim version 1 is built using 2 layer, single sided boards.

That would be an amazing job of optimizing the PCB layout. I take my hat off to them!

Interesting project, but real OPL3 chips are still available, plenty and cheap.