Re: The Pentium P54c, the Turbo Buton and the Internal Cache. And Wing Commander I is Happy!
Posted on 2013-05-30, 20:38
@archsan: About pipelining... true "tight" pipelining (as in RISC processors) was 1st introduced by i486 in x86 family. Pentium has double-pipelined architecture. The 386, 286, and even the 8086 was already somewhat pipelined, i.e. they all had somewhat overlapping fetch, decode, execution ( …