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[General Information]
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| Device Name: | SiS 85C496/85C497 486 Chipset
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| Original Device Name: | SiS 85C496/85C497 486 Chipset
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| Device Class: | Host-to-PCI Bridge
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| Revision ID: | 2
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| PCI Address (Bus:Device:Function) Number: | 0:5:0
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| PCI Latency Timer: | 0
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| Hardware ID: | PCI\VEN_1039&DEV_0496&SUBSYS_00000000&REV_02
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[System Resources]
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| Interrupt Line: | N/A
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| Interrupt Pin: | N/A
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[Features]
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| Bus Mastering: | Enabled
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| Running At 66 MHz: | Not Capable
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| Fast Back-to-Back Transactions: | Capable
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[CPU Configuration]
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| CPU Burst Write: | Disabled
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| CPU Internal Cache Write-Back: | Enabled
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| DRAM Speed: | 40 MHz
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[DRAM Configuration]
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| DRAM Parity: | Disabled
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| DRAM Type: | 4M/8M/16M/32M * 32/36 bit type
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| DRAM Slow Refresh Mode: | Disabled
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| DRAM RAS#-to-CAS# Delay: | 3T
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| DRAM Write Cycle Post: | Disabled (1 WS)
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| DRAM Write Cycle CAS# Pulse Width: | 2T
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| DRAM CAS Precharge Time: | 1T
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[Cache Configure]
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| CPU Burst Order Mode: | Toggle Mode
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| L2 Single Write/Burst Write Cycle: | 2T/1T
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| L2 Burst Read Subsequent Cycle Wait State: | 1T
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| L2/DRAM Single/Burst Read Lead-off Cycle WS: | 2T
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| L2 Write Mode: | Write-Back
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| L2 Cache Size: | 128 KByte
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| L2 Interleave Control: | Single bank, non-interleave mode
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| L2 Dirty Bit Select: | Force Dirty Always Dirty
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| L2 Tag Width Select: | 8 Bit Tag
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| L2 Test (Always Hit): | Disabled
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| External Cache: | Enabled
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[Shadow Configure]
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| Internal Cache Cacheable Area Control: | Non-cacheable
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| PCI, ISA Master Access Shadow RAM Area: | Disabled
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| Shadow RAM Read Control: | Enabled
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| Shadow RAM Write Control: | Enabled
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| 0F8000h-0FFFFFh Shadow RAM: | Enabled
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| 0F0000h-0F7FFFh Shadow RAM: | Enabled
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| 0E8000h-0EFFFFh Shadow RAM: | Disabled
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| 0E0000h-0E7FFFh Shadow RAM: | Disabled
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| 0D8000h-0DFFFFh Shadow RAM: | Disabled
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| 0D0000h-0D7FFFh Shadow RAM: | Disabled
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| 0C8000h-0CFFFFh Shadow RAM: | Disabled
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| 0C0000h-0C7FFFh Shadow RAM: | Enabled
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[Cacheable Control (L1 and L2)]
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| 0F8000h-0FFFFFh RAM: | Non-cacheable
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| 0F0000h-0F7FFFh RAM: | Non-cacheable
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| 0E8000h-0EFFFFh RAM: | Non-cacheable
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| 0E0000h-0E7FFFh RAM: | Non-cacheable
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| 0D8000h-0DFFFFh RAM: | Non-cacheable
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| 0D0000h-0D7FFFh RAM: | Non-cacheable
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| 0C8000h-0CFFFFh RAM: | Non-cacheable
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| 0C0000h-0C7FFFh RAM: | Non-cacheable
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[85C496 Address Decoder]
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| Concurrent Access Control: | Disabled
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| Access to FFF80000h - FFFDFFFFh Forward To: | PCI and ISA Bus
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| Access to B0000h - BFFFFh Forward To: | PCI Bus
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| Access to A0000h - AFFFFh Forward To: | PCI Bus
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| DRAM A, B, D, E Segment Relocate: | Disabled
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[Exclusive Area 0 Setup]
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| Exclusive Area 0 Select: | Non-cacheable Area
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| Area Size: | Disabled
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| Area Base Address: | 0
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[Exclusive Area 1 Setup]
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| Exclusive Area 1 Select: | Non-cacheable Area
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| Area Size: | Disabled
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| Area Base Address: | 0
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[Exclusive Area 2 Setup]
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| Exclusive Area 2 Select: | Non-cacheable Area
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| Area Size: | Disabled
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| Area Base Address: | 0
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[PCI / Keyboard Configure]
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| PCI Arbitration Scheme Select: | Weakest CPU Request
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| CPU-to-PCI Memory Post Write Buffer: | Disabled
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| CPU-to-PCI Memory Burst Write: | Disabled
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| Keyboard Reset/INIT During SMI: | Disabled
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| Emulated PS/2 Keyboard 92h Port: | Disabled
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| Emulated Keyboard Fast Reset Command Latency: | 2 us
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[Output Pin Configuration]
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| PCI Master Burst Read/Write Main Memory: | Disabled
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| CAS[3:0]# Output Buffer Driving Capability: | 24 mA
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| MA[10:0] Output Buffer Driving Capability: | 24 mA
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| MWE# Output Buffer Driving Capability: | 24 mA
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| Multiplexed Pin 207, 204 Select: | PIN 207: PREQ2#, PIN 204: PGNT2#
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| Largest DRAM Type: | 16Mx36
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| Maximum DRAM Bank Number: | 8
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| PCI Master: | 3
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[Build-in IDE Controller / VESA Bus Configuration]
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| IDE Controller Post Write Buffer: | Disabled
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| Channel 0 Prefetch Buffer: | Disabled
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| Channel 1 Prefetch Buffer: | Disabled
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| IDE Controller Address Setup Time Select: | 3 CPUCLKs
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| IDE Controller Channel Select: | CH0 1Fxh, CH1 17xh
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| IDE Controller: | Enabled
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| I/O Ports 1Fx & 3F6 Control: | Enabled
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| I/O Ports 17x & 376 Control: | Enabled
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| PMU DEVDET Generation Mode: | Synchronous Mode
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| CPU INIT Queued by Stop Grant Mode Control: | Disabled
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| VESA Local Device RAMDAC I/O Write Cycle Shadow: | Disabled
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| VESA Local Device LBD# Sampling Point: | End of T2
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[SMRAM Remapping Configuration]
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| ISA Bus Master Request Control: | Enabled
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| SMM A20M# Assertion Control: | Disabled
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| SMRAM Remapping Mode: | Exxxxh -> Axxxxh
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| SMRAM Initialization Mode: | Disabled
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| SMRAM Remapping: | Enabled
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[Programmable I/O Traps Configure]
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| Programmable I/O Trap 1 Area: | 1 Byte
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| Programmable I/O Trap 1: | Disabled
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| Programmable I/O Trap 0 Area: | 1 Byte
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| Programmable I/O Trap 0: | Disabled
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[Programmable I/O Trap 0 Base]
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| Programmable I/O Trap 0 Address | 0
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[Programmable I/O Trap 1 Base]
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| Programmable I/O Trap 1 Address | 0
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[IDE Controller Channel 0 Configuration]
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| Channel 0 Slave Drive Recovery Time: | C
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| Channel 0 Master Drive Recovery Time: | 3
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| Channel 0 Slave Drive Command Active Time: | C
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| Channel 0 Master Drive Command Active Time: | 5
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[IDE Controller Channel 1 Configuration]
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| Channel 1 Slave Drive Recovery Time: | C
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| Channel 1 Master Drive Recovery Time: | C
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| Channel 1 Slave Drive Command Active Time: | C
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| Channel 1 Master Drive Command Active Time: | C
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[Exclusive Area 3 Setup]
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| Exclusive Area 3 Select: | Onboard non-cacheable memory
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| Area Size: | Disabled
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| Area Base Address: | 0
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[Miscellaneous Control]
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| Emulated Keyboard Fast Reset and A20M#: | Disabled
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| Emulated CPU A20M#: | Enabled
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| Emulated CPU Fast Reset: | Enabled
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| Emulated Keyboard 60h/64h Port: | Enabled
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| FPM/EDO Type DRAM Detection: | Disabled
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[PMU Configuration]
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| SMM: | Enabled
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| Stop Clock: | Disabled
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| Software STPCLK#: | Disabled
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| System Management Request Selection: | SMI#
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| Software SMI Generation: | Disabled
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| Break Switch | Disabled
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| Clock Throttling: | Disabled
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[PMU CPU Type Configuration]
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| Deturbo Switch Trigger: | SMI
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| Host Processor Type Selection: | i486DX/DX2/Am486DX/DX2/DX4
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| SMI IRQ for Non-SMI CPU: | IRQ 10
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[STPCLK# Event Control]
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| Assert STPCLK# on Fast Timer Timeout: | Disabled
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| Assert STPCLK# on Generic Timer Timeout: | Disabled
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| Assert STPCLK# on Slow Timer Timeout: | Disabled
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| Deassert STPCLK# on Break Switch Press: | Disabled
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| Deassert STPCLK# on IRQ Event: | Disabled
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| Deassert STPCLK# on NMI# Event: | Disabled
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| Deassert STPCLK# on DMA Request: | Disabled
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| Deassert STPCLK# on PCI Master Request: | Disabled
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[STPCLK# Deassertion IRQ Selection]
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| Deassert STPCLK# on IRQ15: | Disabled
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| Deassert STPCLK# on IRQ14: | Disabled
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| Deassert STPCLK# on IRQ13: | Disabled
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| Deassert STPCLK# on IRQ12: | Disabled
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| Deassert STPCLK# on IRQ11: | Disabled
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| Deassert STPCLK# on IRQ10: | Disabled
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| Deassert STPCLK# on IRQ9: | Disabled
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| Deassert STPCLK# on IRQ8: | Disabled
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| Deassert STPCLK# on IRQ7: | Disabled
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| Deassert STPCLK# on IRQ6: | Disabled
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| Deassert STPCLK# on IRQ5: | Disabled
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| Deassert STPCLK# on IRQ4: | Disabled
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| Deassert STPCLK# on IRQ3: | Disabled
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| Deassert STPCLK# on IRQ2: | Disabled
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| Deassert STPCLK# on IRQ1: | Disabled
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| Deassert STPCLK# on IRQ0: | Disabled
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[Timer Control]
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| Slow Timer Blocking while STPCLK#: | Disabled
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| Generic Timer Blocking while STPCLK#: | Disabled
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| Fast Timer Blocking while STPCLK#: | Disabled
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| Slow Timer: | Disabled
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| Generic Timer: | Disabled
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| Fast Timer: | Disabled
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[Timers Count]
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| Fast Timer Count: | 0
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| Generic Timer Count: | 197
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| Slow Timer Count: | 157
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| RMSMIBLK Timer Count: | 47
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[Clock Throttling Timer Count]
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| Clock Throttling On Timer Count: | 26
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| Clock Throttling Off Timer Count: | 26
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[Clock Throttling On Timer Reload Condition]
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| Video Access Request: | Disabled
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| IRQ Request: | Disabled
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| DMA Request: | Disabled
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| Keyboard and Mouse Event Request: | Disabled
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| Hard Disk / Floppy Disk Access: | Disabled
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| Parallel Port Access: | Disabled
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| Serial Port Access: | Disabled
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| I/O Address Trap 1 Access: | Disabled
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| I/O Address Trap 0 Access: | Disabled
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| PCI Master Request: | Disabled
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[Fast Timer Reload Condition]
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| Video Access Request: | Disabled
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| IRQ Request: | Disabled
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| DMA Request: | Enabled
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| Keyboard and Mouse Event Request: | Disabled
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| Hard Disk / Floppy Disk Access: | Enabled
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| Parallel Port Access: | Enabled
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| Serial Port Access: | Enabled
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| I/O Address Trap 1 Access: | Disabled
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| I/O Address Trap 0 Access: | Disabled
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| PCI Master Request: | Enabled
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[Generic Timer Reload Condition]
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| Video Access Request: | Disabled
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| IRQ Request: | Disabled
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| DMA Request: | Disabled
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| Keyboard and Mouse Event Request: | Disabled
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| Hard Disk / Floppy Disk Access: | Disabled
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| Parallel Port Access: | Disabled
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| Serial Port Access: | Disabled
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| I/O Address Trap 1 Access: | Disabled
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| I/O Address Trap 0 Access: | Disabled
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| PCI Master Request: | Disabled
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[Slow Timer Reload Condition]
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| Slow Timer Time Base: | 9.7 s
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| Video Access Request: | Disabled
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| IRQ Request: | Disabled
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| DMA Request: | Disabled
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| Keyboard and Mouse Event Request: | Disabled
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| Hard Disk / Floppy Disk Access: | Disabled
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| Parallel Port Access: | Disabled
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| Serial Port Access: | Disabled
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| I/O Address Trap 1 Access: | Disabled
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| I/O Address Trap 0 Access: | Disabled
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| PCI Master Request: | Disabled
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[Fast Timer Reload IRQ Selection]
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| Reload Timer on IRQ15 | Enabled
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| Reload Timer on IRQ14 | Enabled
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| Reload Timer on IRQ13 | Enabled
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| Reload Timer on IRQ12 | Enabled
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| Reload Timer on IRQ11 | Enabled
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| Reload Timer on IRQ10 | Enabled
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| Reload Timer on IRQ9 | Enabled
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| Reload Timer on IRQ8 | Disabled
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| Reload Timer on IRQ7 | Enabled
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| Reload Timer on IRQ6 | Enabled
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| Reload Timer on IRQ5 | Enabled
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| Reload Timer on IRQ4 | Enabled
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| Reload Timer on IRQ3 | Enabled
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| Reload Timer on IRQ2 | Disabled
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| Reload Timer on IRQ1 | Disabled
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| Reload Timer on IRQ0 | Disabled
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[Generic Timer Reload IRQ Selection]
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| Reload Timer on IRQ15 | Disabled
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| Reload Timer on IRQ14 | Disabled
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| Reload Timer on IRQ13 | Disabled
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| Reload Timer on IRQ12 | Disabled
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| Reload Timer on IRQ11 | Disabled
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| Reload Timer on IRQ10 | Disabled
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| Reload Timer on IRQ9 | Disabled
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| Reload Timer on IRQ8 | Disabled
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| Reload Timer on IRQ7 | Disabled
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| Reload Timer on IRQ6 | Disabled
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| Reload Timer on IRQ5 | Disabled
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| Reload Timer on IRQ4 | Disabled
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| Reload Timer on IRQ3 | Disabled
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| Reload Timer on IRQ2 | Disabled
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| Reload Timer on IRQ1 | Disabled
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| Reload Timer on IRQ0 | Disabled
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[Slow Timer Reload IRQ Selection]
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| Reload Timer on IRQ15 | Disabled
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| Reload Timer on IRQ14 | Disabled
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| Reload Timer on IRQ13 | Disabled
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| Reload Timer on IRQ12 | Disabled
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| Reload Timer on IRQ11 | Disabled
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| Reload Timer on IRQ10 | Disabled
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| Reload Timer on IRQ9 | Disabled
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| Reload Timer on IRQ8 | Disabled
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| Reload Timer on IRQ7 | Disabled
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| Reload Timer on IRQ6 | Disabled
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| Reload Timer on IRQ5 | Disabled
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| Reload Timer on IRQ4 | Disabled
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| Reload Timer on IRQ3 | Disabled
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| Reload Timer on IRQ2 | Disabled
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| Reload Timer on IRQ1 | Disabled
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| Reload Timer on IRQ0 | Disabled
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[SMI Request Status Selection]
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| Monitor Video Access: | Disabled
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| Monitor IRQ Request: | Disabled
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| Monitor Fast Timer Expire: | Disabled
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| Monitor Generic Timer Expire: | Disabled
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| Monitor Slow Timer Expire: | Disabled
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| Monitor Serial Port Request: | Disabled
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| Monitor Parallel Port Request: | Disabled
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| Monitor Hard Disk/Floppy Disk Request: | Disabled
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| Monitor Keyboard/Mouse Request: | Disabled
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| Monitor Break Switch Request: | Disabled
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| Monitor Software SMI Request: | Disabled
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| Monitor Programmable I/O Trap_1 Request: | Disabled
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| Monitor Programmable I/O Trap_0 Request: | Disabled
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| Monitor PCI Master Request: | Disabled
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| Monitor DMA Request: | Disabled
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[Clock Throttling On Timer Reload IRQ Selection]
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| Reload Timer on IRQ15 | Disabled
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| Reload Timer on IRQ14 | Disabled
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| Reload Timer on IRQ13 | Disabled
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| Reload Timer on IRQ12 | Disabled
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| Reload Timer on IRQ11 | Disabled
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| Reload Timer on IRQ10 | Disabled
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| Reload Timer on IRQ9 | Disabled
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| Reload Timer on IRQ8 | Disabled
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| Reload Timer on IRQ7 | Disabled
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| Reload Timer on IRQ6 | Disabled
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| Reload Timer on IRQ5 | Disabled
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| Reload Timer on IRQ4 | Disabled
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| Reload Timer on IRQ3 | Disabled
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| Reload Timer on IRQ2 | Disabled
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| Reload Timer on IRQ1 | Disabled
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| Reload Timer on IRQ0 | Disabled
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[GPIO Control]
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| GPIO 0: | Disabled
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| GPIO 1: | Disabled
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| Active Level of GPIO 0: | Active Low
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| Active Level of GPIO 1: | Active Low
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| De-bounce Control of GPIO 0: | Disabled
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| De-bounce Control of GPIO 1: | Disabled
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| GPIO 0 Function Control: | De-assert STPCLK#
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| GPIO 1 Function Control: | De-assert STPCLK#
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[GPIO DeBounce Count]
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| De Bounce Counts for GPIO 0: | Disabled
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| De Bounce Counts for GPIO 1: | Disabled
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[PCI INTA#-to-IRQ Link]
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| Link: | Disabled
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| Link Selection: | IRQ0
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[PCI INTB#-to-IRQ Link]
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| Link: | Disabled
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| Link Selection: | IRQ0
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[PCI INTC#-to-IRQ Link]
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| Link: | Enabled
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| Link Selection: | IRQ9
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[PCI INTD#-to-IRQ Link]
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| Link: | Disabled
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| Link Selection: | IRQ0
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[ISA Interrupt Active Level Configuration]
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| IRQ15 Active Level: | Active High
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| IRQ14 Active Level: | Active High
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| IRQ12 Active Level: | Active High
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| IRQ11 Active Level: | Active High
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| IRQ10 Active Level: | Active High
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| IRQ9 Active Level: | Active High
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| IRQ7 Active Level: | Active High
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| IRQ6 Active Level: | Active High
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| IRQ5 Active Level: | Active High
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| IRQ4 Active Level: | Active High
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| IRQ3 Active Level: | Active High
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[85C497 Post / INIT Configuration]
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| INIT to CPU Reset: | Disabled
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| INIT to PCI Reset: | Disabled
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| INTC Compability Select: | PCI Compatible
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| PCI to ISA Posting: | Disabled
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[Deturbo Switch Status]
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| Deturbo Switch Status: | De-asserted
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[ISA BIOS Configuration]
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| FFFA0000h - FFFDFFFFh As ROM Area: | Disabled
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| Exxxxh and FFFExxxxh As ROM Area: | Disabled
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| Fxxxxh and FFFFxxxxh As ROM Area: | Enabled
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| Flash EPROM One-shot: | Write Enabled
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| Flash EPROM: | Write Protected
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| ISA Address Decoder Auto-detect Blocking: | Disabled
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| ISA Address Decoder Write: | Disabled
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[ISA Address Decoder]
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| F0000h - FFFFFh Memory: | Disabled
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| E0000h - EFFFFh Memory: | Disabled
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| D8000h - DFFFFh Memory: | Disabled
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| D0000h - D7FFFh Memory: | Disabled
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| C8000h - CFFFFh Memory: | Disabled
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| C0000h - C7FFFh Memory: | Disabled
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| A0000h - BFFFFh Memory: | Disabled
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| 00000h - 9FFFFh Memory: | Enabled
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[Exclusive Area 2 Base Address]
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| Exclusive Area 2 Select: | Non-cacheable Area
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| Area Size: | Disabled
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| Area Base Address: | 0
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[Miscellaneous Configuration]
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| Extended CMOS RAM Page: | Disabled
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| SA[2:0] and SBHE# Output Buffer Driving Capability: | 24 mA
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| IOR# and IOW# Output Buffer Driving Capability: | 24 mA
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